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Implement LoadPairVector64 and LoadPairVector128 #64864
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Merged
echesakov
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echesakov:Arm64-ASIMD-LoadPairVector64-LoadPairVector128
Feb 10, 2022
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97d2ef3
Add LoadPairVector64 and LoadPairVector128 in AdvSimd.cs AdvSimd.Plat…
echesakov e7e4ef7
Add LoadPairScalarVector64 in AdvSimd.cs AdvSimd.PlatformNotSupported.cs
echesakov fe3cae3
Add LoadPairVector64NonTemporal and LoadPairVector128NonTemporal in A…
echesakov e8acfcb
Add LoadPairScalarVector64NonTemporal in AdvSimd.cs AdvSimd.PlatformN…
echesakov 9c7c982
Update System.Runtime.Intrinsics.cs
echesakov b3f9bef
Add LoadPairScalar() in src/tests/JIT/HardwareIntrinsics/Arm/Shared/H…
echesakov 5109ecb
Add LoadPairVectorTest.template
echesakov 4fc3de7
Add LoadPairVector64 and LoadPairVector128 in GenerateTests.csx
echesakov 120e1e3
Update src/tests/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/*
echesakov dda86a1
Use AdvSimd.Arm64.LoadPairVector128 in ASCIIUtility.cs
echesakov 6d41f27
Use AdvSimd.Arm64.StorePair in BitArray.cs
echesakov bfa5a9f
Use AdvSimd.Arm64.LoadPairVector128 in OptimizedInboxTextEncoder.AdvS…
echesakov c22f924
Add HW_Flag_MultiReg and HWIntrinsicInfo::IsMultiReg() in hwintrinsic.h
echesakov a62d2bc
Add LoadPairVector64 and LoadPairVector128 in hwintrinsiclistarm64.h
echesakov e25774f
Adjust asserts to support multireg intrinsics in Compiler::impHWIntri…
echesakov ccc3f2d
Implement LoadPairVector128/64 in Compiler::impSpecialIntrinsic() in …
echesakov 1246824
Implement LoadPairVector128/64 in CodeGen::genHWIntrinsic() in hwintr…
echesakov f3f5d42
Adjust asserts in Compiler::impAssignStructPtr() and Compiler::impNor…
echesakov 4d17799
Support multi-register HW intrinsics on arm64 in gentree.h gentree.cpp
echesakov 589742f
Support multi-register HW intrinsics on arm64 in lsraAssignRegToTree …
echesakov b5898c7
Extend LinearScan::BuildHWIntrinsic to support intrinsics returning v…
echesakov c1cbc9a
Don't insert indirection when source of a block assignment is a multi…
echesakov e974d4c
Don't morph multireg intrinsic on rhs of a block assigment in src/cor…
echesakov 15e56a0
[mono] Implement LoadPair{,Scalar}Vector{64,128}{,NonTemporal}
imhameed 11e58a4
Undo marking LoadPairVector64/128 as containable in /src/coreclr/jit/…
echesakov 3420e44
Add HWIntrinsicInfo::GetMultiRegCount() helper in src/coreclr/jit/hwi…
echesakov a88b96f
Use HWIntrinsicInfo::GetMultiRegCount() helper in src/coreclr/jit/gen…
echesakov 41b4adb
Use HWIntrinsicInfo::IsMultiReg() in GenTree::IsMultiRegNode() in src…
echesakov ed5e9c0
Revert "Use AdvSimd.Arm64.LoadPairVector128 in ASCIIUtility.cs"
echesakov 936bfa0
Revert "Use AdvSimd.Arm64.LoadPairVector128 in OptimizedInboxTextEnco…
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Do we have any cases of "arg size is 8" but "return size is 16" or vice-versa?
I know some instructions fit that bill, I'm not sure if any of the multi-reg cases will
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I don't see an example on Arm64 when this wouldn't hold.
ld[1-4]should be similar toldp.As for
tblandtbx:the return value is going to be single-reg but the first source operand is multi-reg and composed of
Vector128<byte>.