[RISC-V] Fixing createdump for RISC-V

src/coreclr/debug/createdump/threadinfo.cpp

@@ -29,6 +29,9 @@ GetFrameLocation(CONTEXT* pContext, uint64_t* ip, uint64_t* sp)
 #elif defined(__arm__)
     *ip = pContext->Pc & ~THUMB_CODE;
     *sp = pContext->Sp;
+#elif defined(__riscv)
+    *ip = pContext->Pc;
+    *sp = pContext->Sp;
 #endif
 }
 

src/coreclr/debug/createdump/threadinfo.h

@@ -39,7 +39,7 @@ class CrashInfo;
 struct user_fpregs_struct
 {
   unsigned long long  fpregs[32];
-  unsigned long       fpscr;
+  unsigned long       fcsr;
 } __attribute__((__packed__));
 #endif
 

src/coreclr/debug/createdump/threadinfounix.cpp

@@ -247,7 +247,51 @@ ThreadInfo::GetThreadContext(uint32_t flags, CONTEXT* context) const
         context->Fcc  = m_fpRegisters.fcc;
     }
 #elif defined(__riscv)
-    assert(!"TODO RISCV64 NYI");
+    if ((flags & CONTEXT_CONTROL) == CONTEXT_CONTROL)
+    {
+        context->Ra = MCREG_Ra(m_gpRegisters);
+        context->Sp = MCREG_Sp(m_gpRegisters);
+        context->Fp = MCREG_Fp(m_gpRegisters);
+        context->Pc = MCREG_Pc(m_gpRegisters);
+    }
+
+    if (flags & CONTEXT_INTEGER)
+    {
+        context->Gp = m_gpRegisters.gp;
+        context->Tp = m_gpRegisters.tp;
+        context->T0 = m_gpRegisters.t0;
+        context->T1 = m_gpRegisters.t1;
+        context->T2 = m_gpRegisters.t2;
+        context->S1 = m_gpRegisters.s1;
+        context->A0 = m_gpRegisters.a0;
+        context->A1 = m_gpRegisters.a1;
+        context->A2 = m_gpRegisters.a2;
+        context->A3 = m_gpRegisters.a3;
+        context->A4 = m_gpRegisters.a4;
+        context->A5 = m_gpRegisters.a5;
+        context->A6 = m_gpRegisters.a6;
+        context->A7 = m_gpRegisters.a7;
+        context->S2 = m_gpRegisters.s2;
+        context->S3 = m_gpRegisters.s3;
+        context->S4 = m_gpRegisters.s4;
+        context->S5 = m_gpRegisters.s5;
+        context->S6 = m_gpRegisters.s6;
+        context->S7 = m_gpRegisters.s7;
+        context->S8 = m_gpRegisters.s8;
+        context->S9 = m_gpRegisters.s9;
+        context->S10 = m_gpRegisters.s10;
+        context->S11 = m_gpRegisters.s11;
+        context->T3 = m_gpRegisters.t3;
+        context->T4 = m_gpRegisters.t4;
+        context->T5 = m_gpRegisters.t5;
+        context->T6 = m_gpRegisters.t6;
+    }
+    if (flags & CONTEXT_FLOATING_POINT)
+    {
+        assert(sizeof(context->F) == sizeof(m_fpRegisters.fpregs));
+        memcpy(context->F, m_fpRegisters.fpregs, sizeof(context->F));
+        context->Fcsr = m_fpRegisters.fcsr;
+    }
 #else
 #error Platform not supported
 #endif

src/coreclr/debug/daccess/datatargetadapter.cpp

@@ -131,6 +131,10 @@ DataTargetAdapter::GetPlatform(
         _ASSERTE_MSG(false, "Not supported platform.");
         return E_NOTIMPL;
 
+    case IMAGE_FILE_MACHINE_RISCV64:
+        ulExpectedPointerSize = 8;
+        platform = CORDB_PLATFORM_POSIX_RISCV64;
+    break;
 #else   // TARGET_UNIX
     case IMAGE_FILE_MACHINE_I386:
         ulExpectedPointerSize = 4;

src/coreclr/debug/dbgutil/elfreader.cpp

@@ -115,8 +115,9 @@ ElfReader::PopulateForSymbolLookup(uint64_t baseAddress)
     // Enumerate program headers searching for the PT_DYNAMIC header, etc.
     if (!EnumerateProgramHeaders(
         baseAddress,
-#ifdef TARGET_LINUX_MUSL
-        // On musl based platforms (Alpine), the below dynamic entries for hash,
+#if defined(TARGET_LINUX_MUSL) || defined(TARGET_RISCV64)
+        // On musl based platforms (Alpine) and RISCV64 (VisionFive2 board),
+        // the below dynamic entries for hash,
         // string table, etc. are RVAs instead of absolute address like on all
         // other Linux distros. Get the "loadbias" (basically the base address
         // of the module) and add to these RVAs.

src/coreclr/inc/clrnt.h

@@ -55,6 +55,10 @@
               (MAKELCID(MAKELANGID(LANG_NEUTRAL, SUBLANG_CUSTOM_UNSPECIFIED), SORT_DEFAULT))
 #endif // !SUBLANG_CUSTOM_DEFAULT
 
+#ifndef IMAGE_FILE_MACHINE_RISCV64
+#define IMAGE_FILE_MACHINE_RISCV64        0x5064  // RISCV64
+#endif // !IMAGE_FILE_MACHINE_RISCV64
+
 #ifndef __out_xcount_opt
 #define __out_xcount_opt(var) __out
 #endif
@@ -1106,8 +1110,7 @@ RtlpGetFunctionEndAddress (
     if ((FunctionLength & 3) != 0) {
         FunctionLength = (FunctionLength >> 2) & 0x7ff;
     } else {
-        memcpy(&FunctionLength, (void*)(ImageBase + FunctionLength), sizeof(UINT32));
-        FunctionLength &= 0x3ffff;
+        FunctionLength = *(PTR_ULONG64)(ImageBase + FunctionLength) & 0x3ffff;
     }
 
     return FunctionEntry->BeginAddress + 4 * FunctionLength;

src/coreclr/jit/jit.h

@@ -279,7 +279,7 @@
 #elif defined(TARGET_LOONGARCH64)
 #define IMAGE_FILE_MACHINE_TARGET IMAGE_FILE_MACHINE_LOONGARCH64 // 0x6264
 #elif defined(TARGET_RISCV64)
-#define IMAGE_FILE_MACHINE_TARGET IMAGE_FILE_MACHINE_RISCV64 // 0x5641
+#define IMAGE_FILE_MACHINE_TARGET IMAGE_FILE_MACHINE_RISCV64 // 0x5064
 #else
 #error Unsupported or unset target architecture
 #endif

src/coreclr/pal/src/exception/remote-unwind.cpp

@@ -2175,6 +2175,7 @@ access_reg(unw_addr_space_t as, unw_regnum_t regnum, unw_word_t *valp, int write
     case UNW_PPC64_NIP:    *valp = (unw_word_t)winContext->Nip; break;
 #elif defined(TARGET_RISCV64)
     case UNW_RISCV_X1:     *valp = (unw_word_t)winContext->Ra; break;
+    case UNW_RISCV_X2:     *valp = (unw_word_t)winContext->Sp; break;
     case UNW_RISCV_X3:     *valp = (unw_word_t)winContext->Gp; break;
     case UNW_RISCV_X4:     *valp = (unw_word_t)winContext->Tp; break;
     case UNW_RISCV_X8:     *valp = (unw_word_t)winContext->Fp; break;
@@ -2189,7 +2190,7 @@ access_reg(unw_addr_space_t as, unw_regnum_t regnum, unw_word_t *valp, int write
     case UNW_RISCV_X25:    *valp = (unw_word_t)winContext->S9; break;
     case UNW_RISCV_X26:    *valp = (unw_word_t)winContext->S10; break;
     case UNW_RISCV_X27:    *valp = (unw_word_t)winContext->S11; break;
-    case UNW_RISCV_PC:    *valp = (unw_word_t)winContext->Pc; break;
+    case UNW_RISCV_PC:     *valp = (unw_word_t)winContext->Pc; break;
 #else
 #error unsupported architecture
 #endif