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[SPARC] Remove assertions in printOperand for inline asm operands #104692

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Merged
merged 3 commits into from
Aug 20, 2024
Merged

[SPARC] Remove assertions in printOperand for inline asm operands #104692

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6118412
[SPARC] Loosen assertions in printOperand for inline asm operands
koachan Aug 16, 2024
066acd7
Remove the asserts entirely
koachan Aug 20, 2024
2a198c3
Remove stray include
koachan Aug 20, 2024
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51 changes: 0 additions & 51 deletions llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -314,57 +314,6 @@ void SparcAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
const MachineOperand &MO = MI->getOperand (opNum);
SparcMCExpr::VariantKind TF = (SparcMCExpr::VariantKind) MO.getTargetFlags();

#ifndef NDEBUG
// Verify the target flags.
if (MO.isGlobal() || MO.isSymbol() || MO.isCPI()) {
if (MI->getOpcode() == SP::CALL)
assert(TF == SparcMCExpr::VK_Sparc_None &&
"Cannot handle target flags on call address");
else if (MI->getOpcode() == SP::SETHIi)
assert((TF == SparcMCExpr::VK_Sparc_HI
|| TF == SparcMCExpr::VK_Sparc_H44
|| TF == SparcMCExpr::VK_Sparc_HH
|| TF == SparcMCExpr::VK_Sparc_LM
|| TF == SparcMCExpr::VK_Sparc_TLS_GD_HI22
|| TF == SparcMCExpr::VK_Sparc_TLS_LDM_HI22
|| TF == SparcMCExpr::VK_Sparc_TLS_LDO_HIX22
|| TF == SparcMCExpr::VK_Sparc_TLS_IE_HI22
|| TF == SparcMCExpr::VK_Sparc_TLS_LE_HIX22) &&
"Invalid target flags for address operand on sethi");
else if (MI->getOpcode() == SP::TLS_CALL)
assert((TF == SparcMCExpr::VK_Sparc_None
|| TF == SparcMCExpr::VK_Sparc_TLS_GD_CALL
|| TF == SparcMCExpr::VK_Sparc_TLS_LDM_CALL) &&
"Cannot handle target flags on tls call address");
else if (MI->getOpcode() == SP::TLS_ADDrr)
assert((TF == SparcMCExpr::VK_Sparc_TLS_GD_ADD
|| TF == SparcMCExpr::VK_Sparc_TLS_LDM_ADD
|| TF == SparcMCExpr::VK_Sparc_TLS_LDO_ADD
|| TF == SparcMCExpr::VK_Sparc_TLS_IE_ADD) &&
"Cannot handle target flags on add for TLS");
else if (MI->getOpcode() == SP::TLS_LDrr)
assert(TF == SparcMCExpr::VK_Sparc_TLS_IE_LD &&
"Cannot handle target flags on ld for TLS");
else if (MI->getOpcode() == SP::TLS_LDXrr)
assert(TF == SparcMCExpr::VK_Sparc_TLS_IE_LDX &&
"Cannot handle target flags on ldx for TLS");
else if (MI->getOpcode() == SP::XORri)
assert((TF == SparcMCExpr::VK_Sparc_TLS_LDO_LOX10
|| TF == SparcMCExpr::VK_Sparc_TLS_LE_LOX10) &&
"Cannot handle target flags on xor for TLS");
else
assert((TF == SparcMCExpr::VK_Sparc_LO
|| TF == SparcMCExpr::VK_Sparc_M44
|| TF == SparcMCExpr::VK_Sparc_L44
|| TF == SparcMCExpr::VK_Sparc_HM
|| TF == SparcMCExpr::VK_Sparc_TLS_GD_LO10
|| TF == SparcMCExpr::VK_Sparc_TLS_LDM_LO10
|| TF == SparcMCExpr::VK_Sparc_TLS_IE_LO10 ) &&
"Invalid target flags for small address operand");
}
#endif


bool CloseParen = SparcMCExpr::printVariantKind(O, TF);

switch (MO.getType()) {
Expand Down
10 changes: 10 additions & 0 deletions llvm/test/CodeGen/SPARC/inlineasm.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -152,3 +152,13 @@ define i64 @test_twinword(){
%1 = tail call i64 asm sideeffect "rd %asr5, ${0:L} \0A\09 srlx ${0:L}, 32, ${0:H}", "={i0}"()
ret i64 %1
}

; CHECK-LABEL: test_symbol:
; CHECK: ba,a brtarget
define void @test_symbol() {
Entry:
call void asm sideeffect "ba,a ${0}", "X"(ptr @brtarget)
unreachable
}

declare void @brtarget()