VHDL Self Practice

A collection of VHDL projects and exercises for learning digital design, covering basic to intermediate concepts with simulations in ModelSim and synthesis for FPGAs.

Tools Used

• ModelSim / QuestaSim – For simulation and verification
• Vivado / Quartus – For synthesis and implementation on FPGA boards
• GHDL + GTKWave – For open-source simulation and waveform visualization

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How to Use

1. Open any .vhd file in your preferred VHDL simulator or IDE.
2. Run the simulation with the matching testbench file.
3. Observe waveforms or outputs to verify logic.
4. Modify and experiment with the code to deepen understanding.

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📚 References

• VHDL Tutorial by VHDLwhiz
• Nandland VHDL Tutorials
• IEEE Standard 1076-2008
• GHDL GitHub

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👨‍💻 Author

Manzoor Ambekar

This is a personal learning repository — contributions and suggestions are welcome!