Add documentation for CPUID bit #64+17

CLA: trivial

Reviewed-by: Hugo Landau <[email protected]>
Reviewed-by: Paul Dale <[email protected]>
(Merged from #19670)

(cherry picked from commit ec76891)

Author: jvdsn

doc/man3/OPENSSL_ia32cap.pod

@@ -97,6 +97,8 @@ and RORX;
 
 =item bit #64+16 denoting availability of AVX512F extension;
 
+=item bit #64+17 denoting availability of AVX512DQ extension;
+
 =item bit #64+18 denoting availability of RDSEED instruction;
 
 =item bit #64+19 denoting availability of ADCX and ADOX instructions;