Based on ARM AMBA bus protocol, Verilog is used to design the digital circuit.

The AHB to APB bridge is an AHB slave and the only APB master which provides an interface between the highspeed AHB and the low-power APB. Read and write transfers on the AHB are converted into equivalent transfers on the APB.

This is my hobby project, which contain my rsic-v core and my convolutional layer with AMBA bus

A project to implement and test interrupt controller using Questasim software.

I2S (Inter-IC Sound) interface module with APB (Advanced Peripheral Bus) interface signals. It has control logic for writing and reading data to/from a 4x32-bit FIFO and generates clock (sck), word select (ws), and serial data (sd) signals for I2S transmission.

Verilog implementation of APB bus using VAAMAN.

Popular bus implementations in Verilog HDL

This repo contains a collection of Verilog +System Verilog +RTL +UVM Projects

Design and verification of the Advanced Peripheral Bus (APB) protocol using Verilog. Includes Verilog modules for APB operations and a testbench for verifying functionality and compliance with protocol standards.

This project implements and verifies the Advanced Peripheral Bus (APB) Protocol, a part of the AMBA (Advanced Microcontroller Bus Architecture) developed by ARM. The APB is designed for low-power, simple peripheral communication in System-on-Chip (SoC) designs.

This repo will contain the Verilog code implementation of various protocols that fall within AMBA protocol family such as APB, AHB, AXI and so on. I will implement it in parallel with learning theory. If possible I will also use UVM and system verilog to verify the functionality of the code once I finish learning system verilog and concepts of uvm

An advanced traffic light control system on the Digilent Nexys A7 FPGA