Custom 6502 Video Game Console

SPI slave to External SRAM interface for Cmod A7

SystemVerilog FPGA design of a custom trigger circuit which can be used with oscilloscopes or logic analyzers.

Xilinx Artix-7 FPGA design using block ram, XADC and a SPI slave (SCARF). The block ram is dual port and can be written by either SPI or XADC samples, and only read by SPI.

The FT2232H on the CMOD-A7 is used to drive UART data to read/write to a register map implemented in block ram.

FPGA design to allow for programmable delay on a single signal. Implemented and tested on CMOD_A7