zynqmp_r5: use libmetal extension module

examples/legacy_apps/cmake/options.cmake

@@ -21,8 +21,6 @@ if (NOT DEFINED MACHINE)
 endif (NOT DEFINED MACHINE)
 message ("-- Machine: ${MACHINE}")
 
-string (TOLOWER ${CMAKE_SYSTEM_NAME}      PROJECT_SYSTEM)
-string (TOUPPER ${CMAKE_SYSTEM_NAME}      PROJECT_SYSTEM_UPPER)
 string (TOLOWER ${CMAKE_SYSTEM_PROCESSOR} PROJECT_PROCESSOR)
 string (TOUPPER ${CMAKE_SYSTEM_PROCESSOR} PROJECT_PROCESSOR_UPPER)
 string (TOLOWER ${MACHINE}                PROJECT_MACHINE)

examples/legacy_apps/cmake/platforms/cross_freertos_gcc.cmake

@@ -0,0 +1,14 @@
+set (CMAKE_SYSTEM_NAME      "Generic" CACHE STRING "")
+
+string (TOLOWER "freertos"  PROJECT_SYSTEM)
+string (TOUPPER "freertos"  PROJECT_SYSTEM_UPPER)
+
+set (CMAKE_C_COMPILER   "${CROSS_PREFIX}gcc")
+set (CMAKE_CXX_COMPILER "${CROSS_PREFIX}g++")
+# _exit is in the BSP rather than in libgcc, leaving this out
+# causes errors in try_compile on ARM generic.
+set (CMAKE_TRY_COMPILE_TARGET_TYPE STATIC_LIBRARY)
+
+set (CMAKE_FIND_ROOT_PATH_MODE_PROGRAM	NEVER CACHE STRING "")
+set (CMAKE_FIND_ROOT_PATH_MODE_LIBRARY	NEVER CACHE STRING "")
+set (CMAKE_FIND_ROOT_PATH_MODE_INCLUDE	NEVER CACHE STRING "")

examples/legacy_apps/cmake/platforms/cross_generic_gcc.cmake

@@ -1,5 +1,8 @@
 set (CMAKE_SYSTEM_NAME      "Generic" CACHE STRING "")
 
+string (TOLOWER "generic"  PROJECT_SYSTEM)
+string (TOUPPER "generic"  PROJECT_SYSTEM_UPPER)
+
 set (CMAKE_C_COMPILER   "${CROSS_PREFIX}gcc")
 set (CMAKE_CXX_COMPILER "${CROSS_PREFIX}g++")
 # _exit is in the BSP rather than in libgcc, leaving this out

examples/legacy_apps/cmake/platforms/cross_linux_gcc.cmake

@@ -1,4 +1,8 @@
 set (CMAKE_SYSTEM_NAME      "Linux")
+
+string (TOLOWER "linux"  PROJECT_SYSTEM)
+string (TOUPPER "linux"  PROJECT_SYSTEM_UPPER)
+
 set (CMAKE_C_COMPILER       "${CROSS_PREFIX}gcc")
 set (CMAKE_CXX_COMPILER     "${CROSS_PREFIX}g++")
 

examples/legacy_apps/cmake/platforms/zynqmp_r5_generic.cmake

@@ -4,5 +4,3 @@ set (CROSS_PREFIX           "armr5-none-eabi-" CACHE STRING "")
 
 # Xilinx SDK version earlier than 2017.2 use mfloat-abi=soft by default to generate libxil
 set (CMAKE_C_FLAGS          "-mfloat-abi=hard -mfpu=vfpv3-d16 -mcpu=cortex-r5" CACHE STRING "")
-
-include (cross_generic_gcc)

examples/legacy_apps/examples/echo/freertos/main.c

@@ -51,7 +51,7 @@ static void rpmsg_listen_task(void *unused_arg)
 		if (!rpdev) {
 			LPERROR("Failed to create rpmsg virtio device.\r\n");
 		} else {
-			echo_remote_app(rpdev, platform);
+			rpmsg_echo_app(rpdev, platform);
 			platform_release_rpmsg_vdev(rpdev, platform);
 		}
 	}

examples/legacy_apps/machine/zynqmp_r5/CMakeLists.txt

@@ -1,9 +1,12 @@
 include(CheckSymbolExists)
 
+if (${PROJECT_SYSTEM} STREQUAL "freertos")
+  add_definitions(-DFREERTOS_BSP)
+endif()
+
 collect (APP_COMMON_SOURCES platform_info.c)
 collect (APP_COMMON_SOURCES rsc_table.c)
 collect (APP_COMMON_SOURCES zynqmp_r5_a53_rproc.c)
-collect (APP_COMMON_SOURCES helper.c)
 collect (APP_INC_DIRS "${CMAKE_CURRENT_SOURCE_DIR}")
 
 if (EXISTS "${CMAKE_CURRENT_SOURCE_DIR}/${PROJECT_SYSTEM}/gic_init.c")
@@ -26,6 +29,7 @@ collect (PROJECT_INC_DIRS "${XIL_INCLUDE_DIR}")
 find_library(LIBXIL_LIB NAMES xil PATHS ${CMAKE_FIND_ROOT_PATH})
 get_filename_component(LIBXIL_LIB_DIR ${LIBXIL_LIB} DIRECTORY)
 collect(PROJECT_LIB_DIRS ${LIBXIL_LIB_DIR})
+collect(PROJECT_LIB_DIRS ${CMAKE_LIBRARY_PATH})
 
 # check PM API for certain headers and set client version based
 CHECK_SYMBOL_EXISTS(XPAR_XILPM_ENABLED "xparameters.h" PM_FOUND)
@@ -40,6 +44,8 @@ if(PM_FOUND)
   endif(VERSION_2_PM_CLIENT)
 endif(PM_FOUND)
 
+collect(PROJECT_LIB_DEPS metal_xlnx_extension)
+collect(PROJECT_LIB_DEPS xiltimer)
 collect(PROJECT_LIB_DEPS xil)
 collect(PROJECT_LIB_DEPS xilstandalone)
 collect(PROJECT_LIB_DEPS c)

examples/legacy_apps/machine/zynqmp_r5/freertos/gic_init.c

@@ -19,14 +19,17 @@
 #include "xscugic.h"
 
 /* Interrupt Controller setup */
-int app_gic_initialize(void)
+int system_interrupt_register(int int_num, void (*intr_handler)(void *),
+			      void *data)
 {
+	long ret;
+
 	/*
 	 * Register the ISR with the interrupt controller instance
 	 * initialized by porting layer.
 	 */
-	xPortInstallInterruptHandler(IPI_IRQ_VECT_ID,
-				     (Xil_ExceptionHandler)metal_xlnx_irq_isr,
-				     (void *)IPI_IRQ_VECT_ID);
-	return 0;
+	ret = xPortInstallInterruptHandler(int_num,
+					   intr_handler,
+					   data);
+	return (int)ret;
 }

examples/legacy_apps/machine/zynqmp_r5/generic/gic_init.c

@@ -8,20 +8,21 @@
  * SPDX-License-Identifier: BSD-3-Clause
  */
 
-#include "xparameters.h"
-#include "xil_exception.h"
-#include "xil_printf.h"
-#include "xscugic.h"
 #include <metal/sys.h>
 #include <metal/irq.h>
+#include <metal/irq_controller.h>
 #include "platform_info.h"
 
+#include "xil_exception.h"
+#include "xparameters.h"
+#include "xscugic.h"
+
 #define INTC_DEVICE_ID		XPAR_SCUGIC_SINGLE_DEVICE_ID
 
 static XScuGic xInterruptController;
 
-/* Interrupt Controller setup */
-int app_gic_initialize(void)
+int system_interrupt_register(int intr_num, void (*intr_handler)(void *),
+			      void *data)
 {
 	uint32_t status;
 	XScuGic_Config *int_ctrl_config; /* interrupt controller configuration params */
@@ -38,7 +39,7 @@ int app_gic_initialize(void)
 	 * Initialize the interrupt controller driver
 	 */
 	int_ctrl_config = XScuGic_LookupConfig(INTC_DEVICE_ID);
-	if (!int_ctrl_config)
+	if (int_ctrl_config == NULL)
 		return XST_FAILURE;
 
 	status = XScuGic_CfgInitialize(&xInterruptController, int_ctrl_config,
@@ -47,36 +48,36 @@ int app_gic_initialize(void)
 		return XST_FAILURE;
 
 	/* Only associate interrupt needed to this CPU */
-	for (int_id = 32U; int_id<XSCUGIC_MAX_NUM_INTR_INPUTS;int_id=int_id+4U) {
+	for (int_id = 32U; int_id < XSCUGIC_MAX_NUM_INTR_INPUTS;
+	     int_id = int_id + 4U) {
 		target_cpu = XScuGic_DistReadReg(&xInterruptController,
-						XSCUGIC_SPI_TARGET_OFFSET_CALC(int_id));
+						 XSCUGIC_SPI_TARGET_OFFSET_CALC(int_id));
 		/* Remove current CPU from interrupt target register */
 		target_cpu &= ~mask_cpu_id;
 		XScuGic_DistWriteReg(&xInterruptController,
-					XSCUGIC_SPI_TARGET_OFFSET_CALC(int_id), target_cpu);
+				     XSCUGIC_SPI_TARGET_OFFSET_CALC(int_id), target_cpu);
 	}
-	XScuGic_InterruptMaptoCpu(&xInterruptController, XPAR_CPU_ID, IPI_IRQ_VECT_ID);
+	XScuGic_InterruptMaptoCpu(&xInterruptController, XPAR_CPU_ID, intr_num);
 
 	/*
 	 * Register the interrupt handler to the hardware interrupt handling
 	 * logic in the ARM processor.
 	 */
 	Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_IRQ_INT,
-			(Xil_ExceptionHandler)XScuGic_InterruptHandler,
-			&xInterruptController);
+				     (Xil_ExceptionHandler)XScuGic_InterruptHandler,
+				     &xInterruptController);
 
 	/*
 	 * Disable the interrupt before enabling exception to avoid interrupts
 	 * received before exception is enabled.
 	 */
-	XScuGic_Disable(&xInterruptController, IPI_IRQ_VECT_ID);
+	XScuGic_Disable(&xInterruptController, intr_num);
 
 	Xil_ExceptionEnable();
-
 	/* Connect Interrupt ID with ISR */
-	XScuGic_Connect(&xInterruptController, IPI_IRQ_VECT_ID,
-			(Xil_ExceptionHandler)metal_xlnx_irq_isr,
-			(void *)IPI_IRQ_VECT_ID);
+	XScuGic_Connect(&xInterruptController, intr_num,
+			(Xil_InterruptHandler)intr_handler,
+			(void *)data);
 
 	return 0;
 }