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Pull requests: intel/intel-xpu-backend-for-triton
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[LoadStoreOpToLLVM] Improve the 2D block IO lowering for DPAS and DotOp layout.
#5425
opened Nov 4, 2025 by
chengjunlu
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[NFI]: XPUBackend refactoring to facilitate arch-specific implementations
#5329
opened Oct 16, 2025 by
AndreyPavlenko
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Add one autotuning config to the flex attention benchmark
#5303
opened Oct 14, 2025 by
admitric
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[Draft] Support the globaltimer and smid on Intel Arch
#4816
opened Jul 31, 2025 by
chengjunlu
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Draft
[LoadStoreToLLVM] Refactor the 2D block load lowering.
#4615
opened Jul 4, 2025 by
chengjunlu
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Draft
[BACKEND] Enhance the remove layout implementation to reduce the duplicated values with different layout in scf.for.
#4527
opened Jun 18, 2025 by
chengjunlu
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