[microNPU] Cascader performance model bugfixes #10386
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Change-Id: I6771578f1007b8fea02e2dec7d0c797a6ef6aa5e
Change-Id: Idadc5f354dce42c8dbcdcbe281d324adddb41ba3
* Fixed incorrect num_blocks calculations for both BufferModes. * Fixed similar issues with Read/Write byte calculations. * Fixed an issue where the 'partkernel' flag was not propagated to the performance estimation code. * Fixed single buffering check incorrectly used output shape and block rather than the input shape and block. * Fixed block config not aligned to micro block for Elementwise. Change-Id: Id49b4af555d59fc5ccfc21478d514f14592de53a
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Replaced by: #10510 |
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This PR fixes some bugs related to the microNPU performance model in the cascader.
the performance estimation code.
block rather than the input shape and block.