Skip to content

JIT: ARM64 SVE format encodings, SVE_HY_3A to SVE_IB_3A #98468

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 9 commits into from
Feb 20, 2024
Merged

JIT: ARM64 SVE format encodings, SVE_HY_3A to SVE_IB_3A #98468

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
9 commits
Select commit Hold shift + click to select a range
a0e3ced
Initial format work for prf* instructions
TIHan Feb 14, 2024
d83d037
Formats done
TIHan Feb 14, 2024
45be0e9
Forgot to add CONST14
TIHan Feb 14, 2024
3d69d16
Feedback
TIHan Feb 15, 2024
94f1f6e
Feedback
TIHan Feb 15, 2024
94f687e
Merging with main
TIHan Feb 16, 2024
89f19b5
Fix build
TIHan Feb 16, 2024
6f2e9a4
Fix the merge. Small cleanup.
TIHan Feb 17, 2024
1b4546f
Formatting
TIHan Feb 20, 2024
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
111 changes: 111 additions & 0 deletions src/coreclr/jit/codegenarm64test.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -7599,6 +7599,117 @@ void CodeGen::genArm64EmitterUnitTestsSve()
theEmitter->emitIns_R_R_I(INS_sve_str, EA_SCALABLE, REG_V2, REG_R3, 255, INS_OPTS_NONE,
INS_SCALABLE_OPTS_UNPREDICATED);

// IF_SVE_HY_3A
theEmitter->emitIns_PRFOP_R_R_R(INS_sve_prfb, EA_SCALABLE, SVE_PRFOP_PLDL1KEEP, REG_P1, REG_R2, REG_V3,
INS_OPTS_SCALABLE_S_UXTW); // PRFB <prfop>, <Pg>, [<Xn|SP>, <Zm>.S, <mod>]
theEmitter->emitIns_PRFOP_R_R_R(INS_sve_prfd, EA_SCALABLE, SVE_PRFOP_PLDL1KEEP, REG_P6, REG_R5, REG_V4,
INS_OPTS_SCALABLE_S_UXTW,
INS_SCALABLE_OPTS_MOD_N); // PRFD <prfop>, <Pg>, [<Xn|SP>, <Zm>.S, <mod> #3]
theEmitter->emitIns_PRFOP_R_R_R(INS_sve_prfh, EA_SCALABLE, SVE_PRFOP_PLDL1KEEP, REG_P7, REG_R8, REG_V9,
INS_OPTS_SCALABLE_S_SXTW,
INS_SCALABLE_OPTS_MOD_N); // PRFH <prfop>, <Pg>, [<Xn|SP>, <Zm>.S, <mod> #1]
theEmitter->emitIns_PRFOP_R_R_R(INS_sve_prfw, EA_SCALABLE, SVE_PRFOP_PLDL1KEEP, REG_P0, REG_R2, REG_V1,
INS_OPTS_SCALABLE_S_UXTW,
INS_SCALABLE_OPTS_MOD_N); // PRFW <prfop>, <Pg>, [<Xn|SP>, <Zm>.S, <mod> #2]
theEmitter->emitIns_PRFOP_R_R_R(INS_sve_prfb, EA_SCALABLE, SVE_PRFOP_PLDL1STRM, REG_P1, REG_R2, REG_V3,
INS_OPTS_SCALABLE_S_UXTW); // PRFB <prfop>, <Pg>, [<Xn|SP>, <Zm>.S, <mod>]
theEmitter->emitIns_PRFOP_R_R_R(INS_sve_prfb, EA_SCALABLE, SVE_PRFOP_PLDL2KEEP, REG_P1, REG_R2, REG_V3,
INS_OPTS_SCALABLE_S_UXTW); // PRFB <prfop>, <Pg>, [<Xn|SP>, <Zm>.S, <mod>]
theEmitter->emitIns_PRFOP_R_R_R(INS_sve_prfb, EA_SCALABLE, SVE_PRFOP_PLDL2STRM, REG_P1, REG_R2, REG_V3,
INS_OPTS_SCALABLE_S_UXTW); // PRFB <prfop>, <Pg>, [<Xn|SP>, <Zm>.S, <mod>]
theEmitter->emitIns_PRFOP_R_R_R(INS_sve_prfb, EA_SCALABLE, SVE_PRFOP_PLDL3KEEP, REG_P1, REG_R2, REG_V3,
INS_OPTS_SCALABLE_S_UXTW); // PRFB <prfop>, <Pg>, [<Xn|SP>, <Zm>.S, <mod>]
theEmitter->emitIns_PRFOP_R_R_R(INS_sve_prfb, EA_SCALABLE, SVE_PRFOP_PLDL3STRM, REG_P1, REG_R2, REG_V3,
INS_OPTS_SCALABLE_S_UXTW); // PRFB <prfop>, <Pg>, [<Xn|SP>, <Zm>.S, <mod>]
theEmitter->emitIns_PRFOP_R_R_R(INS_sve_prfb, EA_SCALABLE, SVE_PRFOP_PSTL1KEEP, REG_P1, REG_R2, REG_V3,
INS_OPTS_SCALABLE_S_UXTW); // PRFB <prfop>, <Pg>, [<Xn|SP>, <Zm>.S, <mod>]
theEmitter->emitIns_PRFOP_R_R_R(INS_sve_prfb, EA_SCALABLE, SVE_PRFOP_PSTL1STRM, REG_P1, REG_R2, REG_V3,
INS_OPTS_SCALABLE_S_UXTW); // PRFB <prfop>, <Pg>, [<Xn|SP>, <Zm>.S, <mod>]
theEmitter->emitIns_PRFOP_R_R_R(INS_sve_prfb, EA_SCALABLE, SVE_PRFOP_PSTL2KEEP, REG_P1, REG_R2, REG_V3,
INS_OPTS_SCALABLE_S_UXTW); // PRFB <prfop>, <Pg>, [<Xn|SP>, <Zm>.S, <mod>]
theEmitter->emitIns_PRFOP_R_R_R(INS_sve_prfb, EA_SCALABLE, SVE_PRFOP_PSTL2STRM, REG_P1, REG_R2, REG_V3,
INS_OPTS_SCALABLE_S_UXTW); // PRFB <prfop>, <Pg>, [<Xn|SP>, <Zm>.S, <mod>]
theEmitter->emitIns_PRFOP_R_R_R(INS_sve_prfb, EA_SCALABLE, SVE_PRFOP_PSTL3KEEP, REG_P1, REG_R2, REG_V3,
INS_OPTS_SCALABLE_S_UXTW); // PRFB <prfop>, <Pg>, [<Xn|SP>, <Zm>.S, <mod>]
theEmitter->emitIns_PRFOP_R_R_R(INS_sve_prfb, EA_SCALABLE, SVE_PRFOP_PSTL3STRM, REG_P1, REG_R2, REG_V3,
INS_OPTS_SCALABLE_S_UXTW); // PRFB <prfop>, <Pg>, [<Xn|SP>, <Zm>.S, <mod>]
theEmitter->emitIns_PRFOP_R_R_R(INS_sve_prfb, EA_SCALABLE, SVE_PRFOP_CONST6, REG_P1, REG_R2, REG_V3,
INS_OPTS_SCALABLE_S_SXTW); // PRFB <prfop>, <Pg>, [<Xn|SP>, <Zm>.S, <mod>]
theEmitter->emitIns_PRFOP_R_R_R(INS_sve_prfb, EA_SCALABLE, SVE_PRFOP_CONST7, REG_P1, REG_R2, REG_V3,
INS_OPTS_SCALABLE_S_SXTW); // PRFB <prfop>, <Pg>, [<Xn|SP>, <Zm>.S, <mod>]
theEmitter->emitIns_PRFOP_R_R_R(INS_sve_prfb, EA_SCALABLE, SVE_PRFOP_CONST14, REG_P1, REG_R2, REG_V3,
INS_OPTS_SCALABLE_S_UXTW); // PRFB <prfop>, <Pg>, [<Xn|SP>, <Zm>.S, <mod>]
theEmitter->emitIns_PRFOP_R_R_R(INS_sve_prfb, EA_SCALABLE, SVE_PRFOP_CONST15, REG_P1, REG_R2, REG_V3,
INS_OPTS_SCALABLE_S_UXTW); // PRFB <prfop>, <Pg>, [<Xn|SP>, <Zm>.S, <mod>]

// IF_SVE_HY_3A_A
theEmitter->emitIns_PRFOP_R_R_R(INS_sve_prfb, EA_SCALABLE, SVE_PRFOP_PLDL1KEEP, REG_P1, REG_R2, REG_V3,
INS_OPTS_SCALABLE_D_UXTW); // PRFB <prfop>, <Pg>, [<Xn|SP>, <Zm>.D, <mod>]
theEmitter->emitIns_PRFOP_R_R_R(INS_sve_prfd, EA_SCALABLE, SVE_PRFOP_PLDL1KEEP, REG_P6, REG_R5, REG_V4,
INS_OPTS_SCALABLE_D_UXTW,
INS_SCALABLE_OPTS_MOD_N); // PRFD <prfop>, <Pg>, [<Xn|SP>, <Zm>.D, <mod> #3]
theEmitter->emitIns_PRFOP_R_R_R(INS_sve_prfh, EA_SCALABLE, SVE_PRFOP_PLDL1KEEP, REG_P7, REG_R8, REG_V9,
INS_OPTS_SCALABLE_D_SXTW,
INS_SCALABLE_OPTS_MOD_N); // PRFH <prfop>, <Pg>, [<Xn|SP>, <Zm>.D, <mod> #1]
theEmitter->emitIns_PRFOP_R_R_R(INS_sve_prfw, EA_SCALABLE, SVE_PRFOP_PLDL1KEEP, REG_P0, REG_R2, REG_V1,
INS_OPTS_SCALABLE_D_UXTW,
INS_SCALABLE_OPTS_MOD_N); // PRFW <prfop>, <Pg>, [<Xn|SP>, <Zm>.D, <mod> #2]

// IF_SVE_HY_3B
theEmitter->emitIns_PRFOP_R_R_R(INS_sve_prfb, EA_SCALABLE, SVE_PRFOP_PLDL1KEEP, REG_P0, REG_R1, REG_V2,
INS_OPTS_SCALABLE_D); // PRFB <prfop>, <Pg>, [<Xn|SP>, <Zm>.D]
theEmitter->emitIns_PRFOP_R_R_R(INS_sve_prfd, EA_SCALABLE, SVE_PRFOP_PLDL1KEEP, REG_P7, REG_R4, REG_V3,
INS_OPTS_SCALABLE_D,
INS_SCALABLE_OPTS_LSL_N); // PRFD <prfop>, <Pg>, [<Xn|SP>, <Zm>.D, LSL #3]
theEmitter->emitIns_PRFOP_R_R_R(INS_sve_prfh, EA_SCALABLE, SVE_PRFOP_PLDL1KEEP, REG_P6, REG_R5, REG_V4,
INS_OPTS_SCALABLE_D,
INS_SCALABLE_OPTS_LSL_N); // PRFH <prfop>, <Pg>, [<Xn|SP>, <Zm>.D, LSL #1]
theEmitter->emitIns_PRFOP_R_R_R(INS_sve_prfw, EA_SCALABLE, SVE_PRFOP_PLDL1KEEP, REG_P3, REG_R2, REG_V1,
INS_OPTS_SCALABLE_D,
INS_SCALABLE_OPTS_LSL_N); // PRFW <prfop>, <Pg>, [<Xn|SP>, <Zm>.D, LSL #2]

// IF_SVE_HZ_2A_B
theEmitter->emitIns_PRFOP_R_R_I(INS_sve_prfb, EA_SCALABLE, SVE_PRFOP_PLDL1KEEP, REG_P1, REG_V2, 0,
INS_OPTS_SCALABLE_S); // PRFB <prfop>, <Pg>, [<Zn>.S{, #<imm>}]
theEmitter->emitIns_PRFOP_R_R_I(INS_sve_prfd, EA_SCALABLE, SVE_PRFOP_PLDL1KEEP, REG_P4, REG_V3, 248,
INS_OPTS_SCALABLE_S); // PRFD <prfop>, <Pg>, [<Zn>.S{, #<imm>}]
theEmitter->emitIns_PRFOP_R_R_I(INS_sve_prfh, EA_SCALABLE, SVE_PRFOP_PLDL1KEEP, REG_P0, REG_V4, 62,
INS_OPTS_SCALABLE_S); // PRFH <prfop>, <Pg>, [<Zn>.S{, #<imm>}]
theEmitter->emitIns_PRFOP_R_R_I(INS_sve_prfw, EA_SCALABLE, SVE_PRFOP_PLDL1KEEP, REG_P7, REG_V5, 124,
INS_OPTS_SCALABLE_S); // PRFW <prfop>, <Pg>, [<Zn>.S{, #<imm>}]
theEmitter->emitIns_PRFOP_R_R_I(INS_sve_prfb, EA_SCALABLE, SVE_PRFOP_PLDL1KEEP, REG_P1, REG_V2, 31,
INS_OPTS_SCALABLE_D); // PRFB <prfop>, <Pg>, [<Zn>.D{, #<imm>}]
theEmitter->emitIns_PRFOP_R_R_I(INS_sve_prfd, EA_SCALABLE, SVE_PRFOP_PLDL1KEEP, REG_P4, REG_V3, 248,
INS_OPTS_SCALABLE_D); // PRFD <prfop>, <Pg>, [<Zn>.D{, #<imm>}]
theEmitter->emitIns_PRFOP_R_R_I(INS_sve_prfh, EA_SCALABLE, SVE_PRFOP_PLDL1KEEP, REG_P0, REG_V4, 62,
INS_OPTS_SCALABLE_D); // PRFH <prfop>, <Pg>, [<Zn>.D{, #<imm>}]
theEmitter->emitIns_PRFOP_R_R_I(INS_sve_prfw, EA_SCALABLE, SVE_PRFOP_PLDL1KEEP, REG_P7, REG_V5, 124,
INS_OPTS_SCALABLE_D); // PRFW <prfop>, <Pg>, [<Zn>.D{, #<imm>}]

// IF_SVE_IA_2A
theEmitter->emitIns_PRFOP_R_R_I(INS_sve_prfb, EA_SCALABLE, SVE_PRFOP_PLDL1KEEP, REG_P2, REG_R3,
-32); // PRFB <prfop>, <Pg>, [<Xn|SP>{, #<imm>, MUL VL}]
theEmitter->emitIns_PRFOP_R_R_I(INS_sve_prfd, EA_SCALABLE, SVE_PRFOP_PLDL1KEEP, REG_P7, REG_R4,
31); // PRFD <prfop>, <Pg>, [<Xn|SP>{, #<imm>, MUL VL}]
theEmitter->emitIns_PRFOP_R_R_I(INS_sve_prfh, EA_SCALABLE, SVE_PRFOP_PLDL1KEEP, REG_P1, REG_R2,
0); // PRFH <prfop>, <Pg>, [<Xn|SP>{, #<imm>, MUL VL}]
theEmitter->emitIns_PRFOP_R_R_I(INS_sve_prfw, EA_SCALABLE, SVE_PRFOP_PLDL1KEEP, REG_P0, REG_R5,
-32); // PRFW <prfop>, <Pg>, [<Xn|SP>{, #<imm>, MUL VL}]
theEmitter->emitIns_PRFOP_R_R_I(INS_sve_prfb, EA_SCALABLE, SVE_PRFOP_PLDL1KEEP, REG_P2, REG_R3,
17); // PRFB <prfop>, <Pg>, [<Xn|SP>{, #<imm>, MUL VL}]

// IF_SVE_IB_3A
theEmitter->emitIns_PRFOP_R_R_R(INS_sve_prfb, EA_SCALABLE, SVE_PRFOP_PLDL1KEEP, REG_P0, REG_R1,
REG_R2); // PRFB <prfop>, <Pg>, [<Xn|SP>, <Xm>]
theEmitter->emitIns_PRFOP_R_R_R(INS_sve_prfd, EA_SCALABLE, SVE_PRFOP_PLDL1KEEP, REG_P5, REG_R4, REG_R3,
INS_OPTS_NONE,
INS_SCALABLE_OPTS_LSL_N); // PRFD <prfop>, <Pg>, [<Xn|SP>, <Xm>, LSL #3]
theEmitter->emitIns_PRFOP_R_R_R(INS_sve_prfh, EA_SCALABLE, SVE_PRFOP_PLDL1KEEP, REG_P6, REG_R7, REG_R8,
INS_OPTS_NONE,
INS_SCALABLE_OPTS_LSL_N); // PRFH <prfop>, <Pg>, [<Xn|SP>, <Xm>, LSL #1]
theEmitter->emitIns_PRFOP_R_R_R(INS_sve_prfw, EA_SCALABLE, SVE_PRFOP_PLDL1KEEP, REG_P7, REG_R1, REG_R9,
INS_OPTS_NONE,
INS_SCALABLE_OPTS_LSL_N); // PRFW <prfop>, <Pg>, [<Xn|SP>, <Xm>, LSL #2]
// IF_SVE_HX_3A_B
theEmitter->emitIns_R_R_R_I(INS_sve_ld1b, EA_SCALABLE, REG_V0, REG_P0, REG_V1, 0,
INS_OPTS_SCALABLE_S); // LD1B {<Zt>.S }, <Pg>/Z, [<Zn>.S{, #<imm>}]
Expand Down
10 changes: 10 additions & 0 deletions src/coreclr/jit/emit.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -1478,6 +1478,16 @@ class emitter
assert(!idIsSmallDsc());
idAddr()->_idSvePattern = idSvePattern;
}
insSvePrfop idSvePrfop() const
{
assert(!idIsSmallDsc());
return (insSvePrfop)(idAddr()->_idReg4);
}
void idSvePrfop(insSvePrfop idSvePrfop)
{
assert(!idIsSmallDsc());
idAddr()->_idReg4 = (regNumber)idSvePrfop;
}
#endif // TARGET_ARM64

#endif // TARGET_ARMARCH
Expand Down
Loading